The chip combines two functions — logic operations and data storage — into a single architecture, paving the way to more efficient devices.
Engineers have developed a next-generation circuit that allows for smaller, faster, and more energy-efficient devices that could have major benefits for artificial intelligence systems. The technology uses a 2D material for a logic-in-memory architecture, or a single architecture that combines logic operations with a memory function.
Until now, the energy efficiency of computer chips has been limited by the von Neumann architecture currently used where data processing and data storage take place in two separate units. That means data must constantly be transferred between the two units, using up a considerable amount of time and energy. By combining the two units into a single structure, engineers can reduce these losses. The new chip is made from MoS2, a 2D material consisting of a single layer that’s only three atoms thick. It’s also an excellent semiconductor. The engineers found that MoS2 is particularly well-suited to electronics applications.
The chip is based on floating-gate field-effect transistors (FGFETs) that can hold electric charges for long periods; they are typically used in flash memory systems for cameras, smartphones, and computers. The unique electrical proprieties of MoS2 make it particularly sensitive to charges stored in FGFETs, which is what enabled the engineers to develop circuits that work as both memory storage units and programmable transistors. By using MoS2, they were able to incorporate numerous processing functions into a single circuit and then change them as desired.
The circuit design can reduce the energy loss associated with transferring data between memory units and processors, cut the amount of time needed for computing operations, and shrink the amount of space required. That opens the door to devices that are smaller, more powerful, and more energy efficient. For more information, contact Sarah Perrin at sarah.perrin@epfl.ch
